职位薪资:20-35K
经验:不限
学历:本科
类型:全职
You will be part of an R&D team developing high speed analog and mixed-signal integrated circuits for SerDes IP. You’d leverage your strong understanding of circuit simulation and circuit layout as well as knowledge of bipolar, CMOS, passive structure, and interconnect failure modes. You will work with a cross functional design team of analog and digital designers from a wide variety of backgrounds. Our design environment is best-in-class with a full suite of IC design tools, supplemented by custom in-house tools, and supported by an experienced software/CAD team.
Responsibilities:
involve in analog design and mixed signal IP design, especially the design of high-speed SerDes
Work with a cross functional design team of analog and digital designers from a wide variety of backgrounds
Design innovative analog and mixed-signal integrated circuits based on leading edge technology (like 7nm/10nm)
Design, implement, verify and debug mix-signal circuits
Participate in critical peer reviews
Guide, implement and review layout design
Key Qualifications:
Master’s in EE and related fields
Experience in designing at least four of the following key functions: Clock and Data Recovery, PLLs, Transmitters, Receivers, Bandgaps, ADC/DAC, DC-DC/LDO, ESD
Experience with high-speed SerDes design
Experience with TCL, Perl, C, python, MATLAB, or other scripting languages
Wonderful competence in communicating with peers, excellent in problem solving, good team working spirit
Good English communication
Preferred Experience:
Experience of advanced technology (such as 7nm/10nm)
Experience with project leading and cross-team collaboration
Silicon debug experience
Knowledgeable in Verilog-A